Enabling Millimeter-wave Circuit Techniques for High Data Rate Communication

Download or read book Enabling Millimeter-wave Circuit Techniques for High Data Rate Communication written by Najme Ebrahimiseraji and published by . This book was released on 2017 with total page 147 pages. Available in PDF, EPUB and Kindle. Book excerpt: This dissertation has been mainly focused on reconfigurable mm-wave integrated circuits for next generation wireless communication systems (namely, 5G). One of the major approaches to making 5G a reality is the use of high-frequency signals in the millimeter-wave (mm-wave) frequency band to facilitate access to more bandwidth. This can deliver faster and more reliable data to more users. This dissertation contributes to making wideband, bidirectional, and scalable RFICs for high data rate point-to-point communications over large distances in mm-wave bands, particularly the E-band (71-76 GHz, 81-86 GHz). The E-band is a licensed band in the US, with 10 GHz of bandwidth allocated to low-cost, high-capacity, and point-to-point communication. For backhaul base-stations or air-to-ground communication, a scalable and large-element phased array is desired to acquire the appropriate isotropic radiated power and signal to noise ratio. Additionally, bidirectional operation supporting transmit (TX) and receive (RX) in a single aperture is desirable to minimize the area and save power. This dissertation has focused on new architectures for scalable, bidirectional, and wideband phased arrays using IBM\textquoteright s fastest SiGe technology, 90 nm. In this dissertation, the first E-band scalable phased-array transceiver is proposed based on coupled oscillator architecture. Coupled oscillator phased arrays have the advantage of low power and low complexity, resulting in an architecture that easily scales to the number of elements as multiple die can be aggregated to form a larger array through local oscillator (LO) power distribution and intermediate frequency (IF) power combining. However, silicon processes introduce undesirable parasitics and manufacturing tolerances to the transistor and passive devices. When multiple oscillators are present in a single die, the oscillators couple through the substrate. The substrate coupling introduces additional parasitic coupling paths between oscillators; this causes pulling and, consequently, amplitude and phase variation between the oscillators. In addition, the parasitics from the injection node to the substrate deviate the ILO performance from its ideal behavior. Conventional analysis of the amplitude and phase noise typically ignores the effect of the silicon substrate parasitic effects. This dissertation investigated the nonlinear dynamics of an injection-locked oscillator (ILO), where the effective circuit parameters of ILO performance were observed. More specifically, new amplitude and phase equations are derived that took into account the transistor\textquoteright s device parasitics and silicon substrate\textquoteright s parasitic coupling effects, including the transistor injection node parasitic capacitance ($C_{P}$), substrate parasitic conductive ($R_{sub}$) and dielectric ($C_{j}$) features. The derived models are compared with both the simulation and measurement results. The proposed 2x2 transceiver phased array block diagram described in this dissertation employs 4 injection-locked oscillators (ILOs) operating at a lower frequency range (in this case, 1/4 of the desired LO frequency), followed by a frequency quadrupler, to form a beam in transmit and receive modes. The bidirectional front-end is designed to operate at E-band within 3-dB bandwidth. Since the ILO-based phase shifting is technically challenging at millimeter-wave bands due to the parasitics of the injection circuitry and the oscillator phase noise trade-offs, the high-frequency limitations of the ILO phase shifter is considered and wide locking range and a less parasitic sensitive solution for current injection using folded-cascode architecture is proposed. The proposed ILO-based phase array architecture result in low phase noise and low channel to channel isolation supporting 6 Gb/s data rate at 256 QAM modulation. The conventional architectures of the E-band transceiver require a wide tuning range, around 10 GHz, for the LO signal and wide-bandwidth IF blocks. The wide-bandwidth requirement of LO and IF frequency for mm-waves increases the power consumption and complexity of the system. This dissertation proposes a novel architecture, named the \textquotedblleft Image-selection\textquotedblright{} E-band phased array. This new architecture makes the upper-band (81-86 GHz) and the lower-band (71-76 GHz) of the E-band spectrum images of each other in comparison to the LO signal, which is located at the center frequency (78.5 GHz). Therefore, an image rejection architecture is desired to select the wanted band while rejecting the other. The significant advantage of this architecture is that it only requires an LO with the quadrature phases within a tuning range lower than 1 GHz . This will relax the system design trade-offs to the circuit impairments. For bidirectional operation purpose and preventing use of quadrature generation circuitry at direct intermediate frequency (IF) or radio frequency (RF) signal paths, sliding-IF weaver architecture mixers are employed with the phase inverter in the divider path to select the upper or lower band. This architecture leads in to a flat conversion gain over the bandwidth and low amplitude and phase imbalance. The achieved QAM modulation data rate from this technique is the state of art,\lyxdeleted{najmebi}{Mon May 29 19:43:48 2017}{ } 9Gb/s (64 QAM) with less than 5\% EVM and 12 Gb/s (16 QAM) with less than 10\% EVM.